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Title: SENIOR SYSTEM SOFTWARE ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 01:08:09 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215933
Title: SENIOR DSP DESIGN ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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analysis
Perl
evaluation
Delta
PCIE
digital design
CMOS
channel
PLL
language skills
signal processing
type
Architecture
AUDIO
SERDES
verilog
custom
IC
processing
System Design
MATLAB
ADC
Modeling
Electrical
Integrity
System Modeling
LVDS
ideal
links
DVI
Signal Integrity
problem solving
USB
DAC
analog
Programming
HDMI
Engineering
DSP
language
jitter
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Time Stamp: Wed Dec 21 05:10:37 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215944
Title: FINANCIAL ANALYST at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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analysis
Operations
graphics
headcount
R
SAP
Accounting
reconciliation
Exercise
forecasting
Excel
approach
financials
monthly close
modeling
process
capital
expenses
driving
Manufacturing
computer graphics
Semiconductor industry
groups
cost
Microsoft
Review
preparation
national
budgeting
Access
planning
accruals
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Time Stamp: Tue Dec 20 23:57:05 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215714
Title: ARCHITECTURE MANAGER - TEGRA at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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simulation
analysis
hardware design
graphics
details
integration
SW
validation
smart
architectural
target
SoC
Architecture
architecture
power
processing
investigation
ARCHITECTURE
partitioning
cost
mobile communications
mobile
product requirements
platforms
hardware
hiring
written
documentation
modeling
responsibility
system architecture
drive
optimization
Drive
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Time Stamp: Tue Dec 20 17:16:32 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215725
Title: SILICON POWER ARCHITECT – TEGRA at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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analysis
Perl
Python
statements
SW
real
SILICON
functionality
storage
usage
studies
hubs
driving
architecture
sequencing
study
consumption
Ideal
power
processing
benchmarking
Conduct
algorithms
Power
challenges
mobile
Video
platforms
savings
techniques
simple
dynamic
hardware
debugging
POWER
ASIC
interconnect
Engineers
3D
ICs
board
ARM
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Time Stamp: Tue Dec 20 16:34:52 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215736
Title: CIRCUIT DESIGN ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Tue Dec 20 15:39:32 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215769
Title: MOBILE RELEASE PLANNING MANAGER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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engineering
hardware
logistics
software engineering
Science
product management
improving
PC
MOBILE
history
process
global projects
driving
PLANNING
capture
RELEASE
customer engagement
drive
deliverables
Engineering
operational
Drive
Computer Science
consumer products
schedules
mobile
engagement
closure
delivering
Coordinate
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Time Stamp: Wed Dec 21 00:38:04 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215835
Title: CHANNEL MARKETING MANAGER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Developer Relations
alignment
CHANNEL MARKETING
innovation
graphics
performers
community
film
core
plan
regional
product launches
exploration
driving
technology products
computational
Culture
automotive
North America
Electronics
space
coordination
campaign
aggressive
written
PC
independent
compensation
production
Consumer Electronics
surface
Funding
video
drive
Drive
culture
components
CHANNEL
Campaign
visual
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Time Stamp: Tue Dec 20 15:23:55 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215857
Title: QUALITY SYSTEMS ENGINEERING MANAGER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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engineering
TS
dealing
risk
internal audit
audit
process control
engineers
corporate policies
key performance indicators
business management
quality management
ENGINEERING
Semiconductor manufacturing
ISO
travel
compliance
change
manufacturing
ISO 14001
QUALITY SYSTEMS
quality systems
Data Analysis
action
reduction
Gantt
control
QUALITY
release
Analysis
organizing
logistics
SAP
access
excel
improvement
special projects
charts
process
calibration
Quality
drive
deliverables
Engineering
Quality Systems
board
Drive
listed
review
quality
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Time Stamp: Wed Dec 21 02:16:06 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215868
Title: PROGRAM DIRECTOR - EXASCALE at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Job Description PROGRAM DIRECTOR
Finance
Business
Visio
US Government
Program Management Office
Cray
Physical Science
Security
Project Management Certification
MBA
HPC
Contract
Assembly
Vendor
Presentation
Physical
Government
Excel
Masters
Documentation
Business Administration
PMI
Program Director
Bay
Computer Science
Computer
Scheduling
Contract Negotiations
Vendor Management
Current Security Clearance
Minimum BS
EOE
Director
Certification
Science
Track
Management Skills
Travel
San Francisco Bay Area
Management
Word
JobSkill-LI-CS
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analysis
earned value management
government agencies
PMI
Documentation
Security Clearance
disciplinary
Program Management
Administration
Location
Assembly
Meeting Management
Excel
Vendor
plan
goals
Physical
Government
schedule
DOE
architecture
HP
margin analysis
MBA
bids
program management
Visio
Security
coordination
Travel
Word
Science
San
supercomputing
vendor
world
documentation
Meeting
government
margin
San Francisco
deliverables
Computer Science
Vendor Management
contractors
PowerPoint
Scheduling
prime
Contract Negotiations
content
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Time Stamp: Wed Dec 21 00:30:34 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215901