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Title: SOFTWARE TEST AUTOMATION ENGINEER, DIRECTX at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Tue Dec 20 18:18:19 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215667
Title: TEGRA SYSTEM SOFTWARE MANAGER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Tue Dec 20 16:37:05 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215678
Title: SENIOR DEVICE ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 05:40:35 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215689
Title: SENIOR ASIC TIMING ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Perl
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timing
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power
capture
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Time Stamp: Wed Dec 21 00:30:15 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215700
Title: SENIOR EMBEDDED SYSTEM SOFTWARE ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 05:02:27 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215711
Title: AUTODESK ALLIANCE MANAGER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Moldflow
engineering
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product strategy
alignment
revenue
graphics
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rendering
units
potential
channel
GPU
growth
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Time Stamp: Tue Dec 20 23:38:07 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215722
Title: SR PR MANAGER - TESLA at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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simulation
writing
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processors
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target
core
driving
parallel programming
architecture
manufacturing
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medical
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parallel computing
discover
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Time Stamp: Tue Dec 20 18:57:18 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215733
Title: SYSTEM VALIDATION ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 01:50:20 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215821
Title: SENIOR ASIC TIMING ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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analysis
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formal verification
routing
rules
ECOs
physical design
electrical
physical
timing
TIMING
sizing
Analysis
techniques
Electrical
Tcl
ASIC
timing closure
automation
scripting
improving
closing
improvement
modeling
process
static timing analysis
convergence
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optimization
cell
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closure
quality
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Time Stamp: Tue Dec 20 22:51:25 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215832
Title: PRODUCT FAILURE ANALYSIS ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 03:35:06 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215865