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> JobLocation:"NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)"

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DocType JobTitle JobCompany JobLocation JobType JobSkill JobSkill2 JobSkill-LI-CS JobSkill-LI-CI JobPostedDate JobLatLon Industry Experience Country City State

Query Facets

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ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215923
Title: PRODUCT MANAGER - GEFORCE GAMING at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
PRODUCT MANAGER - GEFORCE GAMING
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
CEO Product Management PC gaming hardware support project management video
Job skill 2
Product Manager EOE MBA Passion CEO Gaming Manager
JobSkill-LI-CS
PC Gaming MBA
JobSkill-LI-CI
engineering analysis roadmap gaming hardware press video games Gaming customer experience PC world unit travel strategic partnerships video MBA drive software solutions product marketing GAMING
Job LatLon
37.3695803,-121.9634136
Industry
Consumer Electronics Computer Software Computer Hardware
Experience
Not Applicable
State
California
City
Santa Clara US
Country
Time Stamp: Wed Dec 21 04:36:25 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215923
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215945
Title: SENIOR MIXED SIGNAL DESIGN ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
SENIOR MIXED SIGNAL DESIGN ENGINEER
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
chip CMOS PLL implementation serial circuit silicon Perl signal Design ADC micron buffer band transistor IC DVI USB debug debugging DAC analog Engineering HDMI
Job skill 2
Design DDR ADC DACs GDDR5 Phd DDR3 Architecture Cadence IC PLLs MIXED SIGNAL DESIGN ENGINEER Circuit PLL Mixed Signal Delta Perl Signal Analog Mask Programming DAC Engineering HDMI EOE Circuit Design DVI USB Electrical Sigma LVDS XA
JobSkill-LI-CS
PLL Mixed Signal CMOS Delta Perl DDR ADC IC DDR3 Architecture USB Circuit Design DVI LVDS Electrical Analog Engineering HDMI Programming DAC
JobSkill-LI-CI
simulation silicon analysis Perl evaluation Delta PCIE layout digital design CMOS Mixed Signal PLL plan language skills DDR3 Architecture verilog timing custom IC band project work ADC DDR analog design Electrical debugging LVDS amps ideal DVI links Circuit Design problem solving USB process DAC characterization analog mentoring Programming HDMI operation Engineering Analog optimization MIXED SIGNAL gap circuit simulation language
Job LatLon
37.3695803,-121.9634136
Industry
Computer Hardware Consumer Electronics Computer Software
Experience
Mid-Senior level
State
California
City
Santa Clara US
Country
Time Stamp: Wed Dec 21 01:57:53 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215945
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2222104
Title: MANAGER OF BUSINESS PLANNING at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
MANAGER OF BUSINESS PLANNING
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Fri Nov 25 01:00:00 CET 2011
Job type
Full-time
Job skill
chip Excel Microsoft Strategy/Planning Product Management Management Supply Chain PowerPoint processor responsibility
Job skill 2
Business Semiconductor MBA Mobile Excel Leadership Bachelor BSEE EOL Tegra Microsoft Office Outlook EOE Managers Business Units Product Management Sales Management Word
JobSkill-LI-CS
Excel Units Operations BOM Microsoft Mobile MBA Product Management Word PowerPoint Outlook Microsoft Office
JobSkill-LI-CI
engineering analysis roadmap Operations supply financial planning Units validation Excel operations unit procurement Semiconductor industry MBA Mobile cost BOM Microsoft fast profitability transitions BUSINESS PLANNING dynamics accurate written short Word forecasting Product Management volume operations management Microsoft Office responsibility PLANNING Outlook drive board strategic planning lines planning PowerPoint pricing
Job LatLon
37.3695803,-121.9634136
Industry
Computer Hardware Consumer Electronics Computer Software
Experience
Mid-Senior level
State
California
City
Santa Clara US
Country
Time Stamp: Wed Dec 21 01:32:58 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2222104
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215525
Title: SOFTWARE ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
SOFTWARE ENGINEER
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
chip infrastructure testing C hardware debugging Python support Information Technology architecture Engineering
Job skill 2
Drive Tegra EE Python
JobSkill-LI-CS
Python C Drive
JobSkill-LI-CI
engineering C hardware Python debugging programming SOC scripting functionality engineers operations testing problem solving screening architecture board Drive diagnostics mobile
Job LatLon
37.3695803,-121.9634136
Industry
Computer Software Consumer Electronics Computer Hardware
Experience
Not Applicable
State
California
City
Santa Clara US
Country
Time Stamp: Tue Dec 20 15:49:14 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215525
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215569
Title: SR. PHYSICAL DESIGN ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
SR. PHYSICAL DESIGN ENGINEER
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
chip noise implementation Perl routing VLSI workstation micron CAD networking back-end set-top box distribution shell Distribution Engineering laptop
Job skill 2
VLSI RC Prior Cadence Graphics Circuit ICC Olympus Pinnacle Perl Synopsys BSEE Magma FE ASICs Extraction Static Distribution Quartz EOE Scheme Spice Talus
JobSkill-LI-CS
Magma Pinnacle Perl VLSI Graphics RC CAD Scheme R Timing TCL Distribution Extraction
JobSkill-LI-CI
analysis Perl routing Pinnacle Magma PHYSICAL DESIGN processors comprehension pt physical design home networking CAD RC physical timing power Graphics VLSI dc delivering assembly home R critical automation scripting Scheme PHYSICAL route production desktop STAR Extraction shell TCL Distribution distribution Timing closure
Job LatLon
37.3695803,-121.9634136
Industry
Computer Hardware Consumer Electronics Computer Software
Experience
Not Applicable
State
California
City
Santa Clara US
Country
Time Stamp: Wed Dec 21 04:36:54 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215569
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215679
Title: CHIEF SECURITY ARCHTECT/TECHNOLOGIST at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
CHIEF SECURITY ARCHTECT/TECHNOLOGIST
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
OS DRM HDCP hardware silicon security OTA architecture Engineering
Job skill 2
Drive Tegra Security Cross Eco Memory EOE Crypto DRM State HDCP BU
JobSkill-LI-CS
DRM SW Content Security OTA Drive
JobSkill-LI-CI
silicon security hardware Content TECHNOLOGIST SW DRM SOC channel auditing operations plan process Eco architecture 3rd party manufacturing prevention deployment drive hardware architecture Drive OTA SECURITY vulnerability Security
Job LatLon
37.3695803,-121.9634136
Industry
Consumer Electronics Computer Software Computer Hardware
Experience
Mid-Senior level
State
California
City
Santa Clara OTA US
Country
Time Stamp: Tue Dec 20 14:25:01 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215679
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215701
Title: SENIOR ASIC TIMING ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
SENIOR ASIC TIMING ENGINEER
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
chip noise implementation cluster Perl routing CPU crosstalk SPICE micron transistor capture ASIC hardware block Tcl cell glitch Engineering convergence
Job skill 2
Analysis Logic Synthesis Static Timing RTL Perl CPU Computer Engineering Computer ASICs EDA Static Engineering EOE ASIC Electrical Tcl
JobSkill-LI-CS
BIST ECO Perl Analysis DFT ASIC Electrical EDA Timing Engineering
JobSkill-LI-CI
Perl analysis routing ECO rules BIST physical design electrical boundary physical timing TIMING power capture sizing DFT Analysis techniques Electrical hardware Tcl checking ASIC timing closure automation scripting improving closing r modeling process convergence Engineering optimization cell Timing EDA closure language aspect
Job LatLon
37.3695803,-121.9634136
Industry
Computer Hardware Consumer Electronics Computer Software
Experience
Not Applicable
State
California
City
Santa Clara US
Country
Time Stamp: Wed Dec 21 00:30:19 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215701
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215712
Title: TEGRA PLATFORM POWER ARCHITECT at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
TEGRA PLATFORM POWER ARCHITECT
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
driver Design Linux architecture EMI kernel ASIC USB microprocessor C hardware battery Engineering
Job skill 2
Design Linux Architects ASIC Design ECS Drive Tegra Tablet System Engineers EE EOE POWER ARCHITECT EMI ASIC USB Clamshell Author Smartphone
JobSkill-LI-CS
Linux USB Engineers EMI ASIC C Drive ARM
JobSkill-LI-CI
committees roadmap Linux kernel device characterization architecture study Ideal power reduction cost mobile Linux platforms techniques C hardware battery written programming POWER kernel vendor relations selection ASIC vendor EMI USB Engineers characterization pumps drive ARM charging Drive mechanisms quality
Job LatLon
37.3695803,-121.9634136
Industry
Computer Hardware Consumer Electronics Computer Software
Experience
Mid-Senior level
State
California
City
Santa Clara US
Country
Time Stamp: Tue Dec 20 17:18:42 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215712
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215767
Title: SYSTEMS DESIGN ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
SYSTEMS DESIGN ENGINEER
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
embedded systems C debug Ph Design IR bit RF portable Engineering
Job skill 2
Ph Analog Design IR Electronics EE RF EOE Wifi BT
JobSkill-LI-CS
BT C Electronics Analog IR RF
JobSkill-LI-CI
embedded systems C BT validation microcontrollers Wifi bom RF Analog board IR Electronics bonus
Job LatLon
37.3695803,-121.9634136
Industry
Consumer Electronics Computer Software Computer Hardware
Experience
Not Applicable
State
California Mississippi
City
Santa Clara BS US
Country
Time Stamp: Tue Dec 20 22:50:50 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215767
More Like This
ID: http://www.linkedin.com/jobs?viewJob=&jobId=2215800
Title: LEAD ASIC INTEGRATION ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
Job Title
LEAD ASIC INTEGRATION ENGINEER
Job Company
NVIDIA
Job Location
NVIDIA - US, CA, Santa Clara (San Francisco Bay Area)
Job Posted Date
Mon Dec 19 01:00:00 CET 2011
Job type
Full-time
Job skill
chip integration logical unit Design Science ASIC static Engineering
Job skill 2
Design Physical RTL Computer Science Computer Static Engineering EOE Science ASIC PD GPUs Electrical DfT Electrical Engineering
JobSkill-LI-CS
Physical ECO PD Science ASIC Electrical Engineering Electrical Computer Science Engineering
JobSkill-LI-CI
engineering analysis ECO integration unit Physical floorplanning physical timing partitioning DfT Electrical INTEGRATION Electrical Engineering Science ASIC timing closure PD route process static timing analysis groups interfacing Engineering Computer Science closure quality
Job LatLon
37.3695803,-121.9634136
Industry
Computer Hardware Consumer Electronics Computer Software
Experience
Mid-Senior level
State
California
City
Santa Clara US
Country
Time Stamp: Wed Dec 21 05:33:16 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215800