154 results found in 19 ms
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Title: SOFTWARE TEST AUTOMATION ENGINEER, DIRECTX at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Tue Dec 20 18:18:19 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215667
Title: TEGRA SYSTEM SOFTWARE MANAGER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Tue Dec 20 16:37:05 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215678
Title: SENIOR DEVICE ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 05:40:35 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215689
Title: SENIOR ASIC TIMING ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Perl
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boundary
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timing
TIMING
power
capture
sizing
DFT
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checking
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automation
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Time Stamp: Wed Dec 21 00:30:15 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215700
Title: SENIOR EMBEDDED SYSTEM SOFTWARE ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 05:02:27 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215711
Title: AUTODESK ALLIANCE MANAGER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Moldflow
engineering
analysis
product strategy
alignment
revenue
graphics
messaging
rendering
units
potential
channel
GPU
growth
business metrics
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metrics
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world
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independent
business reviews
groups
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providers
drive
hosting
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Time Stamp: Tue Dec 20 23:38:07 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215722
Title: SR PR MANAGER - TESLA at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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simulation
writing
alignment
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processors
magnitude
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target
core
driving
parallel programming
architecture
manufacturing
ISV
power
medical
tactics
parallel computing
discover
press releases
fast
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stories
oil
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critical
programming
life
web
news
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writing skills
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builders
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gas
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Time Stamp: Tue Dec 20 18:57:18 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215733
Title: SYSTEM VALIDATION ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 01:50:20 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215821
Title: SENIOR ASIC TIMING ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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analysis
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formal verification
routing
rules
ECOs
physical design
electrical
physical
timing
TIMING
sizing
Analysis
techniques
Electrical
Tcl
ASIC
timing closure
automation
scripting
improving
closing
improvement
modeling
process
static timing analysis
convergence
Engineering
optimization
cell
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EDA
closure
quality
language
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Time Stamp: Tue Dec 20 22:51:25 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215832
Title: PRODUCT FAILURE ANALYSIS ENGINEER at NVIDIA in US, CA, Santa Clara - Job | LinkedIn
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Time Stamp: Wed Dec 21 03:35:06 CET 2011
URL: http://www.linkedin.com/jobs?viewJob=&jobId=2215865